Modular integrated electronics radar



y 28, 1968 T. M. HYLTIN 3,386,092

MODULAR INTEGRATED ELECTRON'ICS RADAR 7 Filed April 10, 1967 14 Sheets-Sheet 1 FIGJ INVENTOR TOM M. H YLTIN imam.

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TEMPLATE INDICATOR VlDEO May 28, 1968 Filed April 10, 1967 Z H M m m a M m a OF NTC NN 2 0 wMET Am 5 5 o s cl 2 RLEW ST 2 ORS CR N T- mw wm m .I Z R RIN .1 W NE M U .l. RCP 4 o m M 3 v N w 6 Y m S G F F O 5 1 l 3 m A 2 M m 89 855% m m D R N RR ER O O 7 GE. F 2 W% 892% m R E 7 f8 m5 wc 865w mm 2 s so P0 w RW 8056 TC Mm 6015 m 6 wwz m M AN A W W o A C R United States Patent 3,386,092 MODULAR INTEGRATED ELECTRONICS RADAR Tom M. I-Iyltin, Dallas, Tex., assignor to Texas Instruments Incorporated, Dallas, Tex., a corporation of Delaware Continuation-impart of applications Ser. No. 397,519, Sept. 18, 1964, and Ser. No. 606,427, Dec. 30, 1966. This application Apr. 10, 1967, Ser. No. 629,761

23 Claims. (Cl. 343--5) ABSTRACT OF THE DISCLOSURE A phased array radar system including a plurality of transmit-receive modules, each including a radiation element and capable of providing power amplification, phase shifting, mixing, frequency multiplication of a transmitted and/or received signal in the module. Various components or parts of the module are described including a solid state mixer, frequency multiplier, phase shifters, power amplifier, transmit-receive switch, as well as a scan control system in conjunction with the phase shifter.

This application is a continuation-in-part application of copending applications SJN- 397,519, filed Sept. 18, 1964, and S.N. 606,427, filed Dec. 30, 1966, now abandoned.

This invention relates to rader utilizing solid-state modules in the transmission and reception of micro-' wave energy, and more particularly to a modular electronic radar having a multi-element phased array antenna. Airborne radar systems have been faced with the problems of minimizing weight while at the same time increasing reliability. Other problems have involved the generation of high power microwave energy and the associated involved signal processing and computer circuitry. For example, major problems in the reliability of the radar have arisen with the auxiliary equipment such as rotary joints, servo motors with the antennas, and the like, these reliability difficulties existing even in the most modern of all transistorized radars produced for airborne service. Further, the use of magnetrons for transmitting, klystrons for local oscillator service, and the use of high power transmit-receive (TR) protection devices all have severely restricted the reliability of the overall system.

The present invention is therefore directed to overcoming these problems and, while this invention is immediately advantageous in connection with the construction and operation of airborne radar, it also has application to other radar systems such as those used for ground mapping, search and detection, fire control, tracking, and navigation, and may be programmed to operate in any of the above modes or at several of such modes on a time sharing basis. In addition, individual sections or portions of the microwave modules may be utilized in communication systems of all types as will become readily apparent from the detailed description.

Accordingly, the present invention is directed to an improved radar system which utilizes an array of solidstate functional electronic blocks or modules so construced as to operate as a modular antenna array which may be responsive to beam steering control and which may be operated at a desired power level and at a desired high frequency, for example at X band frequencies of say 9 gc. (9X10 cycles per second). The construction of each of these modules enables the achievement of a light-weight multi-element array antenna using electronic beam scanning with the elimination of wave guides, rot-ary joints, motors, synchros, gears and other servo comice ponents normally essential to a scanning system. In addition to a substantial reduction in total volume and weight over known or existing radars, the radar system of the present invention is accompanied by a substantial increase in the reliability of the overall system.

Each individual antenna module of the array is capable of amplifying phase shifting, and frequency multiplying, a transmitted signal in the module prior to the application of the signal to the radiation structure of the module as well as amplifying and phase shifting the received signal in the module which is representative of the electromagnetic radiation sensed by the radiation element. Each individual antenna module with its individual power generation and phase control permits electronic beam steering.

In accordance with one specific embodiment of the present invention, the radar comprises an antenna formed of a multiplicity of modules forming a planar radiation array operated by applying a low power pulsed RF carrier coincident in time and in phase to each module. Simultaneously a low power R-F phase control pulse is applied in phase to each module. The phase of the phase control pulse is shifted by phase angles dependent upon the position of each module in the array and in dependence upon a predetermined beam angle. The phase shifted low power pulse is then combined with the RF carrier pulse for production of a pulse which is amplified and applied to the antenna. Electromagnetic energy reflected to the antenna following excitation thereof produces a received signal in each module. The received signal is shifted in each module by a phase angle related to the phase shift of the phase control carrier pulse. All of the phase shifted received signals are then combined to produce output signals from the radar.

In accordance with this preferred embodiment, the phase shifted RF carrier pulses are amplified in each module to a power level exceeding that to be applied to the antenna, and are then frequency-multiplied for excitation of the antenna at a frequency substantially in excess of the frequency of the low-power pulse of the RF carrier. Phase control for the antenna excitation and for the received signal is carried out at a comparatively low power level. Power amplification and frequency multiplication are carried out in each antenna module with integrated circuit instruction which may include an integrated circuit mixer for the receive signal in each module. This embodiment includes the combination of a manifold for the supply of DC power and of comparatively low level RF carrier pulses, and an antenna array formed of the modules each coupled to the manifold. As noted each module includes radiation structure, power amplifier means for driving the radiation structure, and phase shift means for controlling the phase of the transmitted pulses and for controlling the phase of the received signals from the radiation structure.

In an another embodiment of the present invention, the phased array radar system includes a plurality of transmit-receive modules, each module having an antenna element and input and output signal channels. During the transmit cycle, an RF carrier signal, of a frequency of 2.25 gl-Iz. for example, is passed through the input channel to a preamplifier, a duplexer switch, a binary phase shift circuit, a power amplifier, a frequency quadrupler, and a TR switch to the antenna element which then generates electromagnetic radiation of 9.0 gHz., for example, from the antenna. During the receive cycle, a signal of 2.125 gHz., for example, is applied through the input channel to the preamplifier, the duplexer switch, a binary phase shifter, 'a second frequency quadrupler, and is then applied as an 8.5 gHz. local oscillator injection voltage to a mixer. The

3 received signal representative of the RF energy received by the antenna element is passed by the TR switch through the output channel to this mixer, and the output of the mixer is passed through an IF preamplifier as an IF output signal at 500' MHz., for example.

Also described is the means for product-ion of output power at a desired increased frequency involving the use of frequency multipliers of integrated circuit construction whereby the multiplier involves a varactor in a semiconductor body with transmission lines matched to the input and output impedance of the multiplier, with idlers at selected harmonic frequencies of an input signal frequency, and with input and output filters to prevent power flow from the multiplier other than at the desired frequency.

Further, the integrated circuit multiplier provides an output of X-band frequency after power amplification. A high resistivity substrate is provided with a ground plane conductor on the bottom thereof. A conductive film overlays a portion of the top of the substrate. A thin high dielectric layer covers the conductive film. A plurality of spaced capacitor plates are formed on the dielectric layer. Conductive strips of loop form interconnect the plates and each extend beyond the margin of the conductive film to form inductances. A resonant circuit connecting one of the loops to the ground plane conductor and including the variable capacitor semiconductor diode resonant at the desired frequency in the X-band.

The integrated circuit frequency multiplier is of strip line construction with inductances and capacitances portions formed of narrow conductive strips over thick dielectric sections connected in series with wide conductive strips over thin dielectric sections where the dielectric sections are formed of a semiconductor in which at least one varactor diode is formed and is connected in shunt relation across the transmission lines.

In a further aspect, a line switching phase shift control is illustrated in which a phase control carrier pulse at a first frequency undergoes a first phase shift before mixing with an RF carrier pulse for antenna module excitation. Received signals from the module are then passed through the same phase shifting network but are at a different frequency to be shifted by a different phase angle than the phase control carrier. Frequency multiplication of the antenna excitation pulse is provided by an amount equal to the ratio of the frequencies of the phase control pulse and frequency of the received signal. Also described is a binary phase shift circuit for incorporation into the module of the invention.

For a more complete understanding of the present invention and for further objects and advantages thereof, reference may now be had to the following description taken in conjunction with the accompanying drawings in which:

FIGURE 1 diagrammatically illustrates the operation of an aircraft, its antenna array, and the functional electronic block employed to make up the array;

FIGURE 2 illustrates one form of a solid-state antenna module;

FIGURE 3 is a block diagram of the terrain-following radar of FIGURE 1;

FIGURE 4 is a block diagram of the electronics in each module;

FIGURE 5 is a top view of a solid-state mixer circuit of FIGURE 4 comprising a surface-oriented diode, a strip transmission line, and a coupler;

FIGURE 6 is a sectional view taken along line 66 of FIGURE 5 illustrating a planar alloy, surface-oriented diode;

FIGURE 7 is a modified form of surface-oriented diode in which diffusion techniques are employed;

FIGURE 8 is a highly enlarged top view of the surface-oriented diode;

FIGURE 9 illustrates preliminary steps in forming the 4 diode of FIGURE 7;

FIGURE 10 illustrates further processing steps in forming the diode of FIGURE 7;

FIGURE 11 is a top view of the diode structure of FIGURE 10;

FIGURE 12 is a modified mixer construction employing a surface-oriented diode 'wafer and ceramic substrate;

FIGURE 13 is a lumped constant diagram of the multiplier circuit of FIGURE 4;

FIGURE 14 is a top view of an integrated circuit embodiment of the multiplier of FIGURE 13;

FIGURE 15 is a sectional view taken along lines 1515 of FIGURE 14;

FIGURE 16 is an enlarged view of the fabrication sequence of the diode of FIGURE 14 in planar form;

FIGURE 17 is a sectional vie-w of a multiplier in which a mesa diode is employed;

FIGURE 18 is a reactance vs. frequency diagram for the multiplier circuit;

FIGURE 19 illustrates a phase shift delay strip-line panel;

FIGURE 20 is a sectional view of the integrated circuit of one unit of FIGURE 19 taken along lines 2020;

FIGURE 2t illustrates video amplifier construction for the IF preamplifier of FIGURE 4;

FIGURE 22 is a schematic diagram illustrating distribution of reference voltages to the antenna modules;

FIGURE 23 is a top view of antenna 12 illustrating beam-scanning;

FIGURE 24 illustrates generation of reference voltages for the antenna modules;

FIGURE 25 is a time plot of the sequence of operation of the radar of FIGURE 4;

FIGURE 26 is a highly simplified block diagram of another design of a radar system in which the modules of the present invention may be used;

FIGURE 27 is a block diagram of a module in accordance with another embodiment of the present invention;

FIGURE 28 is a detailed schematic circuit diagram of the module of FIGURE 27;

FIGURE 29 is an enlarged schematic circuit diagram of the transmit phase shift circuit of FIGURE 28;

FIGURES 30a-30d are phase angle diagrams which serve to illustrate the operation of the phase shift network shown in FIGURE 29; and

FIGURE 31 is a truth table which serves to illustrate the operation of the counter and the two phase shift circuits of the phase shift network shown in FIGURE 28.

The invention will be described as it is employed in a terrain-following radar. In this system, an aircraft 10 has an antenna unit 12 mounted in the nose 13. Antenna unit 12 is comprised of a multiplicity of functional electronic blocks, such as the block 14. In the example illustrated in FIGURE 1, 448 such blocks make up an antenna array of octagonal shape. The face of each block is of the order of one inch (1") square. Block 14 is adapted to be plugged into a suitable frame in the antenna unit 12 to transmit and receive electromagnetic energy by way of slot 15.

The video information made available by the radar is then processed to provide terrain-following capabilities. For example, in accordance with one mode of operation employed in a system known as the template system, a premaster trigger is supplied to the template generator concurrently with each transmitted pulse from the antenna unit 12 to initiate a synthetic echo. This echo or template trigger occurs at a time range that is based upon the desired clearance altitude, the characteristics of the air frame, and the scan position. The range of the template trigger changes with the scan angle. The scan angle is varied by adjusting the relative phase relationships between the microwave energy applied to each of the modules in the antenna unit 12 during one vertical scan.

The scan angle defines the template shape such as illustrated in FIGURE 1 by the outline 16. The video return or received signals are compared with the synthetic echos to obtain proportional command signals. The video return signal received before the synthetic echo signal is employed to generate climb commands. Similarly, the video return signal received after the synthetic echo gencrates dive commands.

Use of the present invention involves a multi-element, phased antenna array of solid-state construction capable of operation as above outlined as well as in other modes. A new and unique structural and functional relationship between integrated semiconductor circuits is employed for antenna excitation and for beam steering any of a plurality of modes.

The modules of antenna unit 12 are of identical construction and may be of the character illustrated in FIG- URES 1 and 2, where a planar face member is provided with a slot 15 leading to microwave circuits which are excited by pulses of an RF carrier of X-band frequency.

Antenna module 14 is unique in that it includes its own power generation circuit and receiver preamplifier circuit and in addition has its own phase shift circuit for beam steering. Included in the block 14 are a plurality of integrated circuits 24-29 which have the same gross appearance as units manufactured and sold by Texas Instruments, Inc., of Dallas, Tex., under the trademark Solid Circuits.

The size of the module is determined or limited by the allowable spacing between radiating elements for avoidance of spurious grating lobes.

SYSTEM BLOCK DIAGRAM As shown in FIGURE 3, module 14 includes an RF unit 30, a phase shift unit 31, and a control network 32. The phase shift network receives low-power RF carrier pulses by Way of channel 33 and delivers output signals of IF frequency by way of channel 34. A beam steering or phase control voltage is applied to the control network 32 by way of channel 35. While only one module 14 has been shown in FIGURE 3, it is to be understood that the 448 blocks illustrated in the antenna unit 12 of FIG- URE 1 will similarly be excited and controlled from a manifold 40.

A source 41 supplies a pulsed RF carrier at 2.125 go. to manifold under the control of a pulse compression generator 44. An oscillator 42 supplies a pulsed phase control carrier at 125 me. to the manifold 40. As will hereinafter be explained, the phase control carrier is employed for introducing a selected phase shift into the RF pulse from source 41. A local oscillator 43 applies a continuous low level voltage to manifold 40 at a frequency of 8.5 gc.

Output signals at an IF frequency appear on channel 34 and are applied from module 14 to manifold 40 for processing. As indicated, the IF signals from modules in the upper quarter of the antenna unit 12 are summed and appear on output channel 45. The sum of the IF output signals from the upper center quarter of the antenna unit 12 appears on channel 46. The sum of the IF output signals from the lower center quarter of the antenna unit 12 appears on channel 47, and corresponding signals from the lower quarter of antenna unit 12 appear on output channel 48.

Channels 45 and 47 are connected to the inputs of a 3 db hybrid coupler 50. The signals on channels 46 and 48 are applied to the inputs of a coupler 51. One output from coupler 50 is applied to a coupler 52 by way of a 45 phase delay unit 53. The second input to coupler 52 is supplied by one output of coupler 51. In a similar manner, a fourth coupler 54 is supplied by way of a phase delay unit 55 and by coupler 50. The output signals from couplers 52 and 54 are applied to IF amplifiers 56 and 57, respectively, which in turn feed pulse compression filters 58 and 59. Detectors 60 are driven by output signals from filters 58 and 59 and in turn drive a monopulse resolution improvement processor and video amplifier 61. A signal recognition circuit 62 excited by unit 61 drives a command computer 63, one output of which may be applied by way of a converter 64 to an autopilot 65.

An automatic gain control (AGC) 66 excited by the output of unit 61, controls IF amplifiers 56 and 57. A sensitivity time control (STC) unit 67 also feeds IF amplifiers 56 and 57 under the control of a timer synchronizer 68. Synchronizer 68 also feeds the command computer, as do command input function generators 69- 73. Generator 69 is a scan computer indicating the direction of the antenna beam. If an objective is present, then the system generates a control signal for autopilot 65. Generator 70 provides a signal representative of velocity of the aircraft. Generator 71 generates a signal representative of the actual flight vector. Generator 72 is a ride control generator, and determines whether a rough or smooth course is followed, i.e., how abruptly the aircraft will change attitude when a target or obstacle is sensed. Generator 73 generates a signal representative of the aircraft pitch angle.

In the light of the foregoing description and with a knowledge of the various modes of operation of radar, it will be recognized that exacting requirements are placed upon the elements to be included in module 14. In order to provide antenna power at the level necessary, solidstate circuits are employed with circuit configurations such that the necessary power may be supplied to the antenna and the desired versatility and control thereof are available within the capabilities of solid-state semiconductor networks.

ANTENNA MODULE CIRCUIT FIGURE 4 is a lumped constant representation of integrated circuits for: (a) receiving compression-modulated RF carrier pulses at a relatively low-power level from channel 33; (b) receiving phase control carrier pulses on channel 83; (c) shifting the phase of the phase control carrier in the phase shift unit 31; (d) modulating the RF pulses with the phase shifted pulses in the mixer 85; (e) amplifying one of the modulation products in the power amplifier 30; (f) stepping up the frequency of the high power signal in the frequency multiplier 86; (g) applying the final output pulses to an antenna 87; (h) detecting return signals to the antenna 87; (i) mixing the same in a mixer 88 at the input of a preamplifier 89; and (j) passing the detected signals from amplifier 89 through the phase shift unit 31 for delivery to an output channel 34.

For the purpose of the present example, the operation will be such that the RF pulses applied to channel 33 will be at a frequency of 2.125 gc., 10.625 mc., the swing of 1.25 Inc. being from low frequency to high frequency by pulse compression generator control of the oscillator 41 as shown in FIGURE 3. The phase control carrier applied to terminal 83 will be at 125 me. The signal applied to the antenna 87 will be 9 go. and the output signal on channel 34 will be at 500 Inc. The module delivers one watt peak power to the antenna 87 at 9 go.

The compression-modulated RF carrier pulses applied to the channel 33 pass through a tuned filter at the input of the mixer 85. A second tuned filter 101 is located in the output channel leading from the phase shift unit 31 and is tuned to me. for modulating the 2.125 gc. carrier pulse. The output circuit 102 is then tuned to the upper side band or 2.250 gc. for driving the power amplifier 30. The phase shifting unit 31 is employed to control the phase of the carrier at the output tuned circuit 102.

PHASE SHIFTING BY LINE LENGTH SWITCHING Beam scanning is provided for the antenna made up of a plurality of modules 14. As shown in FIGURE 4,

beam scanning is produced by switching discrete lengths of transmission line into the antenna feed system and more particularly into the channel through which the 125 me. phase control carrier is transmitted. This is a step-type phase shifter. The size of the smallest step is important in determining the complexity of the control circuit. In the unit 31, five transmission lines are employed and are of such length as to provide phase delay units 111-115 of 11 /4, 22 /2 45, 90, and 180 delays, respectively, at a frequency of 500 me. The 125 mc. signal applied to terminal 83 will undergo delays one-fourth of the amounts noted.

The phase shifter and switching unit 31 includes diodes 120 and 121 forming an input switch. The common juncture between diodes 120 and 121 is connected to diode switches 122 and 123. Delay line 111 is connected to diode 123 and thence, by way of diode 124 and condenser 125, to the input channel 126 leading to the second stage of the phase shifter 31. The diode 122 is connected by way of condenser 127 to channel 126. The switches 122, 123, and 124 are selectively biased under the control of a bistable multivibrator 128. A second multivibrator 129 controls transmission through, or the bypass channel for, the second delay line 112. Multivibrators 130, 131, and 13.2 similarly control inclusion or deletion of lines 113, 114, and 115, respectively, from the transmission channel for the 125 me. phase control carrier. A sixth multivibrator 133 is connected to the output of multivibrator 132 and in turn feeds a TR switch comprised of diodes 137 and 138.

The switch control line 140 leading to the multivibrator is supplied from a clock input channel 141 at 1 me. by way of an AND gate 142. The second terminal of the AND gate is fed by voltage comparator unit 143. The line 144 of multivibrator 128 is connected by way of condenser 145 to the input line 146 of multivibrator 129. Similarly, condensers 147-150 connect multivibrators 129-133 in a ripple-through configuration. From zero phase delay, the first clock pulse actuates multivibrator switch unit 128 to include line 111 in the 125 me. circuit. The second clock pulse actuates units 128 and 129 to remove line 111 and to include line 112. The third pulse actuates unit 128 to include line 111 with line 112. The fourth pulse actuates units 128, 129, and 130 to remove lines 111 and 112 and to include line 113. Thus, a digital progression is employed in increasing the delay in the delay line unit.

The multivibrator 128 is coupled by way of lines 151 and 152 to a digital-to-analog converter 153. Similarly, all of the other multivibrators are coupled to the digitalto-analog converter so that the state of the switching I networks is indicated by an analog signal in the output line 154. Switch unit 133, while introducing no delay, applies current to converter 153 proportional to 360 phase delay so that the line switching sequence may continue through two cycles or 720. The output signal from converter 153 is applied to the second input of the voltage comparator 143.

In operation, a reference voltage representative of the desired phase delay for module 14 is applied to the input terminal 35. So long as the reference voltage exceeds the output from the converter 153, the output from the comparator 143 enables the AND gate 142. With the AND gate 142 conductive, the clock pulses from terminal 141 successively shift conduction between the various flip-flops. When the output of the converter 153 equals the reference voltage on channel 35, the AND gate 142 discontinues transmission of the clock pulses and the desired delay is then fixed in the phase shift unit 31. Thereafter, the simultaneous application of the compressed RF carrier pulse and the phase control carrier pulse to terminals 33 and 83, respectively, will produce a pulse of 2.25 gc. at the output of the tuned circuit 102 in the mixer 85. The phase of the 2.250 gc. signal at circuit 162 is equal to the phase delay in the unit 31.

The signal from mixer is then applied to the power amplifier 31) for delivery of about two watts peak power at 2.25 gc. to the input of the frequency multiplier 86. The multiplier 86 consists of resonant circuits in which a diode 160 is the active element. The multiplier is a quadrupler for delivery to the output channel 161 of a pulse whose frequency is 9 gc. at a peak power levelof about one watt. The latter pulse is applied by way of a TR switch diode 162 to the antenna 87 for radiation at the phase set by the phase delay unit 31.

Immediately after pulse transmission from the antenna, the control multivibrator 163 for the TR switch 162, 164 changes state so that return signals detected by the antenna 87 pass through TR switch diode 164 to the input to a mixer 88. The mixer 88 is supplied with an 8.5 gc. local oscillator signal on channel 165. The lower side band modulation product at 500 me. is applied to the IF preamplifier 89. The latter signal then passes through the switch diode 138 and the phase shift unit 31 where the signal undergoes a delay of four times the delay of the phase control carrier. This is with the same delay unit setting as employed during the transmit operation. The delay IF signal then passes through the output switch diode 121 to the output channel 34 leading to the manifold. While not shown, control units for TR switch 120, 121 and TR switch 137, 138 will provide bias voltages therefor in the same manner as the bias is supplied TR switch 162, 164.

More particularly, it will be recalled that the phase control carrier applied to terminal 83 was at a frequency of mc., and that it passed through the phase shift unit 31 to control the phase of the RF pulse applied to the antenna 87. Since the multiplier 86 quadruples the frequency, the phase shift introduced by the unit 31 is also quadrupled in the antenna drive signal as it appears on channel 161. Thus, with the output of the IF preamplifier 89 at 500 mc., the output signal on channel 34 will have exactly the same phase shift as introduced into the antenna drive pulse. Thus, the same phase shift unit is used for both the transmit and the receive cycle and the beam direction is the same for receiving as for transmitting.

With power amplifier 30 present, module 14 includes its own power generation means and thus operates on low level signals from the manifold. The circuit 30 raises the power level by about 20 db in the preamplifier section 30a, about 6 db in the driver 3%, and about 4 db in the output section 300. By way of example, the power applied to the input of the preamplifier would be about 2 milliwatts (mw.) peak or 0.2 mw. average power. The signal at the input to the driver 305 would be at about 200 mw. peak or 20 mw. average. The power applied to the output stage would be about 800 mw. peak or 80 mw. average. The power output from the output stage would be about 2 watts peak or 0.2 watt average power. In accordance with the construction hereinafter to be described, the multiplier would operate to increase the frequency from 2.25 gc. to 9 gc. with an insertion loss of 3 db to provide one watt peak power to the antenna 87. Thus, the power generation chain consists of 3 or 4 amplifier stages at 2.25 gc. followed by an X4 varactor multiplier with an output at 9 gc.

MIXER In the system illustrated in FIGURE 4, as in other microwave systems where a high-frequency, low-level return signal is employed, the quality of the receiver largely determines the other system parameters. For operations at frequencies transmitted by antenna element 87, the noise level of the mixer 88 presents the principal problem and the mixer comprises a critical and principal component of the receiver portion of FIGURE 4.

Mixer 88 converts the received signal to a lower frequency preferably with a minimum of added noise. To optimize the noise level for the receiver, both the signalto-noise ratio of the mixer and the conversion loss in the mixer must be as low as possible. The detected signal from diode 164 and a local oscillator output signal on line 165 of FIGURE 4 are applied to a semiconductor junction and the difference as IF output signal is extracted.

For operation at frequencies in the X-band, the mixers illustrated in FIGURES 5-12 may be employed. Operation thereof is characterized by low loss, employing high ratio couplers of integrated circuit form.

More particularly, as shown in FIGURE 5, a semiconductor water 210 is provided with a signal input strip 211 and a local oscillator input strip 212. Strips 211 and 212 are metallized regions overlaying a high resistivity semiconductor wafer. The metallized regions 211 and 212 lead to the input portions of a hybrid coupler 213. The coupled 213 is provided with parallel sections 214 and 215 which are about one-quarter wavelength long and are of a width substantially greater than the width of the strips 211 and 212. Two shunt strips 216 and 217 are spaced approximately one-quarter wavelength apart and extend between sections 214 and 215. Output lines 218 and 219 extend from the coupler 213.

A pair of quarter-wave transformer sections 220 and 221 extend from the output strips 218 and 219, respectively, and make contact with terminals of surface-oriented diodes 222 and 223, respectively. Output conductors 224 and 225 lead from the other terminals of diodes 222 mid 223 to output capacitors 226 and 227 to provide an output signal at output terminals 228 and 229.

With strip-line transmission lines overlaying the semiconductor wafer 210 and with surface-oriented diodes of a construction hereinafter described, a signal in the X- band may be converted to IF with about a 5 db loss. F or example, a 9 go. signal may be applied to strip 211. A local oscillator signal at 8.5 gc. may be applied to the input strip 212. As a result, an IF signal of 500 mc. is produced at terminals 228 and 22?.

The surface-oriented diode 222 is illustrated in one form in FIGURE 6. The wafer 210, of intrinsic silicon, is provided with a ground plane conductive layer 230. The intrinsic silicon forms a high resistivity zone above the ground plane layer 230. An N-type alloyed region 231 and a P-type alloyed region 232 are formed in the surface of the wafer 210 opposite the ground plane layer 230. A silicon dioxide insulating layer 233 is formed over the upper surface of wafer 210 to cover the surface emergence of the junctions forming the boundaries between the P- type and N-ty-pe alloyed sections and the intrinsic wafer 210. An N-type metal alloy strip 220 is then formed on the surface of the wafer 210 so as to make electrical contact with the N-type region 231. A P-type metal alloy strip 224 is formed on the surface to make electrical contact with the P-type region 232. The P-type and Ntype metal alloy strips 220 and 224 are evaporated onto the surface through holes in oxide masks defined by photolithographic techniques. The metal alloy ships are then alloyed into the silicon to produce the N+ and P+ regions between the strips and the N-type and P-type regions 231 and 232. An intrinsic region 234 is disposed between the N and P regions, the boundary junctions of which are shown in dotted outline.

Such fabrication of the surface-oriented mixer diode is in a form compatible with the integrated circuit construction. The diode is a substantial improvement over conventional microwave mixer elements. Previous mixer diodes have been of the point contact variety in order to maintain low junction capacitance. The present construction has achieved junction capacitances of 0.05 picofarad (pf) or less. When biased by rectification of the local oscillator signal to obtain the best noise figure, the shunt resistance of the junction of the present invention is approximately 400 ohms. In ordinary mixer diode configuration, this value of resistance is transformed to an input impedance of about 50 to 100 ohms by the package inductance and the junction capacitance. In the present case, the junction diameter of the diode is approximately 0.1 mil (0.0001 inch). Production of a semiconductor junction of this size, as above noted, employs intrinsic silicon having side-by-side alloy zones to form confronting edge junctions that will give the surface diode effect.

The material required for the integrated circuit preferably will provide a suitable substrate for microwave strip transmission lines and for forming the mixer semiconductor junctions. Intrinsic silicon and high resistivity gallium arsenide may be employed for mixer diodes, whereas germanium has characteristics which are not suitable for both the microwave strip transmission line and the diode construction. Where extremely low loss transmission lines are required, low loss dielectrics with deposited silver conductors are employed. Yttrium-iron-garnet (YIG) sub strates may also be employed for this purpose.

FIGURE 7 illustrates a modified form of surfaceoriented diode wherein side-by-side diffusions of oppositeconductivity type impurities are formed on the upper surface of an intrinsic silicon wafer 240. The N-type diffused zone 241a and the P-type diffused zone 242a are characterized by an edge junction that will give the surface diode effect. The zones 241a and 242a are formed partially in N+ and P-| diffusion zones 241 and 242, respectively, which in turn are formed in an insulated island of intrinsic silicon about 1 mil wide and 5 mils long formed in the wafer by a insulating layer 243 of silicon dioxide.

The spacing between the edges of the diffused N+ and P+ zones 241 and 242 is about 0.3 mil in zone 247. However, the zone 248 between the confronting junctions of the N and P zones 241a and 242a is about 0.1 mil wide. The capacitance of the junction is defined by the effective junction area of the shallow diffusions and the reverse breakdown by the shallow diffused spacing and the intrinsic or I-layer concentration. Conductivity modulation under forward current conditions is minimized by reason of the effective increase injection area of the anode of the deep P+ diffusion. The problem is in defining the I-layer between the diffusion fronts so that a sufficient current density can be obtained at reasonable current levels. For currents of 20 milliamps, about a 4 square mil area will give a current density of 200* amps per square centimeter required for conductivity modulation. An insulating layer 244 covers the surface of the wafer except for metallized contact zones 245 and 246.

Surface-oriented diodes of the type illustrated in FIG- URES 6 and 7 may be employed in the mixer of FIGURE 5. Where additional current-carrying capacity is required of surface-oriented diodes, as in the transmit-receive switches employed in various systems, the construction such as shown in FIGURE 8 may be employed.

In FIGURE 8,, the transmission lines 220 and 224 are shown contacting the diffused zones 241 and 242, respectively. The diffused zone 241 has three fingers. The zone 242 has two fingers with the fingers being enmeshed or interdigitated to provide a junction of high current-carrying capability. Such a construction exhibits low junction capacitance under moderate reversed-bias conditions and low loss.

Intrinsic silicon as the substrate material for the diodes provides insulation isolation for any number of components deposited upon it and also provides a low loss structure. The structure is readily adaptable to receiving strip transmission lines deposited directly onto the silicon. In accordance with one mode of fabrication, a ground plane conductor is evaporated onto the bottom of an intrinsic silicon substrate of approximately 5 mils thickness. Silicon dioxide on the top is etched to expose the silicon where transmission lines are required. Gold is then evaporated over the entire surface and selectively removed to leave gold over the exposed regions of the silicon. Preferably, in order to maintain the propagation properties of the lines, the alloying of gold with silicon will be avoided, as by the forming of a thin layer, a few microns thick,

ill

of a material such as molybdenum between the gold strips and the silicon.

As an alternative mode of fabrication, a hot substrate evaporation of gold onto the intrinsic silicon is carried out. The gold is then etched away to leave the transmission lines where required. At microwave frequencies, the degradation of leakage current due to the introduction of the gold into the silicon is of little consequence. 1n the same manner, aluminum strip transmission lines may be formed on gallium arsenide to form the transmission line pattern on a given substrate. Thus, the mixer of FIG- URE 2 is a flat, integrated circuit package. The integrated circuit may be part of more complex circuits formed on the same or interconnected substrates.

Referring again to FIGURE 7, a diffused, a surfaceoriented diode with insulation isolation represents a preferred embodiment of the invention. One procedure for forming this structure is shown in FIGURES 9-11. The structure illustrated in FIGURES 9l1 is similar to the structure illustrated in FIGURE 7, and corresponding parts will therefore be designated by corresponding reference numerals. However, the structure of FIGURES 9- 11 is illustrated as round, while the structure of. FIGURE 7 is rectangular. The surface of a single crystal, high-resistivity substrate of N-type material is etched on the surface to form a mesa 246a on the top surface. The oxide layer 243 is then grown over the upper surface of the etched wafer and over the mesa 240:: to form an insulating layer over the entire etched surface. The material forming the bulk substrate 210 of the structure in FIG- URE 7 is then deposited or grown over the top of the slice 240 to completely cover the insulation layer 243 and to surround the insulation covered mesa. After the bulk material 210 is grown onto the top of the wafer, the top (in FIGURE 9) of the bulk material 210 is lapped smooth for receiving the ground plane conducting layer 230 shown in FIGURE 7.

The substrate 240 is then lapped so that all of the original wafer is removed except for the mesa which is then the island 240a located in a well or depression surrounded by the isolation layer of silicon oxide 243 as shown in FIGURE 10. Thereafter as shown in FIGURE 11, through a photomasking technique, N+ and P-ldiffusions are made to form the zones 241 and 242 of opposite-conductivity types in the island 240a.

Inside the island there is then high enough impurity concentration for good low resistivity ohmic contact. The low resistivity (high concentration) ditfusions have a very narrow intrinsic zone between them, of the order of 0.3 mil wide. Into this area of original material, there are made two very shallow diffusions 241a and 242a of N and P-type materials, respectively. The diffusions are very shallow (3 lines or 3 x 0.616 mil) with high concentrations. The junction between the N and P shallow diffusion zones 241a and 242a is not or need not be accurately positioned as long as it is within the 0.3 mil strip. The junction between the two zones is 1 mil wide and 3 lines deep or an area of l x 3 x 0.0l6 mil 0.048. sq. mil. This results in a very low capacitance junction suitable for use in the mixer of FIGURE 5. Contacts 245 and 246 are readily applied to the two N+ and P+ regions of FIGURES l0 and 11 to be used for bonding or pressure contacts aI- loyed in.

Where the diode is to be employed in the mixer application, the separation 248, FIGURE 7, between the junctions will be reduced to zero. The boundaries of the two zones will thus be contiguous. Surface-oriented diodes for use in switching applications will be constructed with separation between the two zones and for high current capability, will be interdigitated as shown in FIGURE 8.

In FIGURE 7, transmission lines 245 and 246 extend along the top of the insulating layer 244 and contact with the zones 241 and 242, respectively. Preferabl the transmission linc leading to and from the surface-oriented diode, except for the insulation over the junctions as shown in FIGURE 7, will be formed directly on the surface of the semiconductor material Zltl. Preferably, ground plane conductor 230 and the low resistance conductive strips 245 and 245 are gold and overlay an extremely thin film of a metal such as molybdenum, as above noted, or of vanadium, platinum, nickel or tungsten evaporated to a thickness of a few microns to form an underlayer for each strip. The underlayer having a high eutectic temperature will prevent the formation of lossy zones that would otherwise be present where gold strips to be formed directly onto the silicon surface and then subjected to treatment at temperatures wherein the silicon would become intermixed with the gold at the boundary thereof. Such zones are avoided by the use of the thin film 249. The ground plane layer 230 is shown as having been formed over a film 249:: on the bottom surface of the structure as shown in FIGURE 7 where the film 249a would be of materials the same as film 249.

Thus, for switching use, the diode junctions are spaced apart to form a PN diode junction. For mixer use, the confronting portions of the junctions are contiguous or overlap to form a PN diode junction. In the latter case, the boundary of the last diffused zone would define the diode junction.

In FIGURES 6ll, surface-oriented diodes are formed in a semiconductor substrate and thus involve a single basic building material. In FIGURE 12, a modified form of mixer construction has been illustrated. In this embodiment, a relatively thick high dielectric ceramic layer 251 has a ground plane conductive layer 252 on the bottom face thereof with a thin high eutectic metallic layer 252:: thereunder. The strip-line conductors 253 and 254 are formed on the upper face of the ceramic substrate 251. A surface-oriented diode 255 having difiused P and N-type zones 256 and 257 respectively formed therein is then employed in a sandwich construction to form a diode which corresponds with the diode 222 of FIGURE 5. The diode 255 is formed in a thin wafer or chip of semiconductor material and then placed face down onto the ends of the stripline conductors 253 and 254. An isolated insulation layer 259 is then formed over the top of the ceramic substrate 251 to encompass the diode 255. A glass evaporate layer 258 is then deposited on top of the insulated layer 259. A high eutectic metal layer with a ground plane surface conductive layer 260 is then formed on top of the layer 258. A conductor serves to connect the ground plane layers 252 and 269 together for forming a shielded sandwich construction for the mixer transmission line elements and the surface-oriented diode.

FREQUENCY MULTIPLIER The frequency multiplier 86 of FIGURE 4 has been further illustrated in a lumped constant equivalent form in FIGURE 13. The L matching section includes a series inductance 310 and a shunt capacitance 311. A low pass filter comprised of series inductances 312 and 313 and shunt capacitance 314 provides a low pass filter tuned to 2.25 gc. The resonant circuit which includes the active element is comprised of series inductances 315 and 316. A shunt capacitance 317 is connected to the juncture between inductances 313 and 315. A series resonant shunt circuit comprised of inductance 318 and capacitance 319 is connected to the juncture between inductances 315 and 316. A shunt circuit comprised of an inductance 320 and a diode 321 is connected to the juncture between inductance 316 and the series inductance 322 forming a part of the output band pass filter. The band pass filter includes series inductance 322, capacitance 323, capacitance 324, and series inductance 325. Shunt capacitance 326 is connected to the juncture between capacitances 323 and 324. The output L matching section includes series inductance 327 and a shunt capacitance 328.

The formation of the multiplier in one integrated circuit configuration is shown in FEGURES l4 and 15. Prior 

